並列タイトル等20 nm MOSFETs におけるソース・ドレイン抵抗の高次効果を含む解析飽和ドレイン電流モデル
一般注記type:Thesis
In device design of sub-20 nm metal-oxide-semiconductor field-effect transistors (MOSFETs), an accurate analytical current model including an effect of source and drain series resistance becomes important. To investigate the effects of the series resistance, the current driving capability is calculated for planar bulk, fully-depleted silicon-on-insulator (FD SOI), and multigate (MG) MOSFETs using the international technology roadmap for semiconductors (ITRS) data. We find that the effect of the series resistance becomes larger year by year, and the change of the resistance effect due to the structure change is small. An analytical model for saturation drain current including the higher order terms of the series resistance effect is derived to improve the accuracy of the model and understand the physical meaning of the effect of higher-order terms, and simulated. As a result, the higher order terms are important for analyzing the effect of the series resistance as gate length decreases. The resistance ratio of the source resistance to the channel resistance is dominant factor in device design for sub-20 nm MOSFETs. We investigate the structural dependence of the series resistance on saturation drain current in sub-20 nm technology nodes. The reduction rate of the saturation drain current due to the effect of the series resistance is calculated in planar bulk, FD SOI, and MG MOSFETs in high-performance (HP), low-operating-power (LOP), and low-standby-power (LSTP) technologies. We know that the reduction rate of the saturation drain current depends on the structure change of MOSFET. The dominant factor for the reduction rate of saturation drain current is the ratio of the series resistance to the channel resistance in HP technology. The dominant factor for the reduction rate of saturation drain current is the ratio of the overdrive voltage to the supply voltage in LOP technology. The dominant factor for the reduction rate of saturation drain current is the resistance and the voltage ratios in LSTP technology.
連携機関・データベース国立情報学研究所 : 学術機関リポジトリデータベース（IRDB）（機関リポジトリ）