Low-V_t Small-offset Gated Preamplifier for Sub-1-V Gigabit DRAM Arrays

Journal name: International Solid-States Circuits Conference Digest of Technical Papers, Feb. 2009

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Material Type: 記事
Title: Low-V_t Small-offset Gated Preamplifier for Sub-1-V Gigabit DRAM Arrays
Author Heading: AKIYAMA Satoru
Publication Date: 2009
Publication Date (W3CDTF): 2009
Periodical title: International Solid-States Circuits Conference Digest of Technical Papers, Feb. 2009
Pages: 142-143
Publication date of volume/issue (W3CDTF): 2009
Target Audience: 一般
Data Provider (Database): 国立情報学研究所 : CiNii Research
https://cir.nii.ac.jp/
Original Data Provider (Database): CiNii Articles
NAID: 10025261429