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Analysis and design of resilient VLSI circuits : mitigating soft errors and process variations

Analysis and design of resilient VLSI circuits : mitigating soft errors and process variations
Paper図書
Rajesh Garg, Sunil P. KhatriSpringerc2010
Other Libraries in Japan

Hardware acceleration of EDA algorithms : custom ICs, FPGAs and GPUs

Hardware acceleration of EDA algorithms : custom ICs, FPGAs and GPUs
Paper図書
Kanupriya Gulati, Sunil P. KhatriSpringerc2010
Other Libraries in Japan
  • Author HeadingGulati, Kanupriya Khatri, Sunil P.

Minimizing and exploiting leakage in VLSI design

Minimizing and exploiting leakage in VLSI design
Paper図書
Nikhil Jayakumar ... [et al.]Springerc2010
Other Libraries in Japan
  • Author HeadingJayakumar, Nikhil Paul, Suganth Garg, Rajesh Gulati, Kanupriya Khatri, Sunil P.

On and off-chip crosstalk avoidance in VLSI design

On and off-chip crosstalk avoidance in VLSI design
Paper図書
Chunjie Duan, Brock J. LaMeres, Sunil P. KhatriSpringerc2010
Other Libraries in Japan
  • Author HeadingDuan, Chunjie LaMeres, Brock J. Khatri, Sunil P.

Analysis and design of resilient VLSI circuits : mitigating soft errors and process variations / Rajesh Garg, Sunil P. Khatri.

Analysis and design of resilient VLSI circuits : mitigating soft errors and process variations / Rajesh Garg, Sunil P. Khatri.
Paper図書
Springerc2010.<ND386-B15>
National Diet Library
  • Author HeadingGarg, Rajesh. Khatri, Sunil P., 1965-

Cross-talk noise immune VLSI design using regular layout fabrics

Cross-talk noise immune VLSI design using regular layout fabrics
Paper図書
Sunil P. Khatri, Robert K. Brayton, Alberto L. Sangiovanni-VincentelliKlwer Academic Publishersc2001
Other Libraries in Japan
  • Author HeadingKhatri, Sunil P. Brayton, Robert King Sangiova...

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