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デジタル記事
インターネットで読める全国の図書館
- 要約等In this paper, we introduce the Datarol-II processor, that can efficiently execute a fine-grain multi-thread program, called Datarol. In order to achieve the effi......ient multi-thread execution by ......witching overhead, we introduce an implicit register load/store mechanism in the exe......tion pipeline. A two-level hierarchical memory system is also introduced ...... reduce memory access latency. The simulation results show that the Datarol-II processor can tolerate remote memory access latencies and execute a fine-grain multi-thread program efficiently. PARLE'94 Parallel Architectures and Languages Europe : 6th Internati...
- 関連情報Lecture Notes in Computer Science || 817 || p781-784 http://limu.is.kyushu-u.ac.jp/index_j.html
デジタル記事
インターネットで読める全国の図書館
- 要約等In this paper, we introduce the Datarol-II processor, that can efficiently execute a fine-grain multi-thread program, called Datarol. In order to achieve the effi......ient multi-thread execution by ......witching overhead, we introduce an implicit register load/store mechanism in the exe......tion pipeline. A two-level hierarchical memory system is also introduced ...... reduce memory access latency. The simulation results show that the Datarol-II processor can tolerate remote memory access latencies and execute a fine-grain multi-thread program efficiently.
- 著者標目Tetsuo Kawano Shigeru Kusakabe Rin-ichiro Taniguchi Makoto Amamiya