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Digital clocks for synchronization and communications / Masami Kihara, Sadayasu Ono, Pekka Eskelinen. (Artech House telecommunications library)
Digital clocks for synchronization and communications / Masami Kihara, Sadayasu Ono, Pekka Eskelinen. (Artech House telecommunications library)
Paper
図書
Artech House
c2003.
<ND513-B1>
National Diet Library
LCC
TK7868.T5
Multi-objective optimization in physical synthesis of integrated circuits
Multi-objective optimization in physical synthesis of integrated circuits
Paper
図書
David A. Papa, Igor L. Markov
Springer
c2013
Other Libraries in Japan
LCC
TK7868.T5
Logic-timing simulation and the degradation delay model
Logic-timing simulation and the degradation delay model
Paper
図書
Manuel J. Bellido, Jorge Juan, Manuel Valencia
Imperial College Press
c2006
Other Libraries in Japan
LCC
TK7868.T5
Timing
Timing
Paper
図書
by Sachin Sapatnekar
Kluwer Academic
c2004
Other Libraries in Japan
LCC
TK7868.T5
Digital system clocking : high performance and low-power aspects cloth
Digital system clocking : high performance and low-power aspects cloth
Paper
図書
Vojin G. Oklobdzija ... [et al.]
IEEE
c2003
Other Libraries in Japan
LCC
TK7868.T5
High-speed clock network design
High-speed clock network design
Paper
図書
by Qing K. Zhu
Kluwer Academic Publishers
c2003
Other Libraries in Japan
LCC
TK7868.T5
Skew-tolerant circuit design
Skew-tolerant circuit design
Paper
図書
David Harris
Morgan Kaufmann Publishers
c2001
Other Libraries in Japan
LCC
TK7868.T5
Synchronization design for digital systems
Synchronization design for digital systems
Paper
図書
by Teresa H. Meng ; with contributions by David Messerschmitt, Steven Nowick, David Dill
Kluwer Academic
c1991
Other Libraries in Japan
LCC
TK7868.T5
Digital timing circuits : pbk.
Digital timing circuits : pbk.
Paper
図書
J.B. Gosling
E. Arnold
1985
Other Libraries in Japan
LCC
TK7868.T5
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