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システムLSIにおける動画像符号化処理の高性能化，低電力化及び低遅延化に関する研究

システムLSIにおける動画像符号化処理の高性能化，低電力化及び低遅延化に関する研究
Digital博士論文障害者向け資料あり
望月,誠二2019-03-25
Available onlineNational Diet LibraryOther Libraries in Japan
  • Subject Heading動画像符号化 システムLSI 低電力 低遅延 Video codec System-on-a-chip Low power Low latency
  • Alternative Title...rocessing in a system-on-a-chip
  • Alternative Title...rocessing in a system-on-a-chip

An SoC test scheduling algorithm using reconfigurable union wrappers

An SoC test scheduling algorithm using reconfigurable union wrappers
Digital文書・図像類
Yoneda, Tomokazu, Imanishi, Masahiro, Fujiwara, HideoNara Institute of Science and Technology2006-09Information Science Technical ReportTR2006006
Available onlineOther Libraries in Japan
  • Subject Headingsystem-on-a-chip test scheduling reconfigurabl...

Area and time co-optimization for system-on-a-chip based on consecutive testability

Area and time co-optimization for system-on-a-chip based on consecutive testability
Digital文書・図像類
Yoneda, Tomokazu, Uchiyama, Tetsuo, Fujiwara, HideoNara Institute of Science and Technology2003-02Information Science Technical ReportTR2003002
Available onlineOther Libraries in Japan
  • Subject Headingsystem-on-a-chip design for testability test a...

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