Integrated circuit and system design : power and timing modeling, optimization and simulation : 18th international workshop, PATMOS 2008 : Lisbon, Portugal, September 10-12, 2008 : revised selected papers. : Sep 2008, Lisbon, Portugal.

• 資料種別: 図書
• ISBN: 9783540959472 (ISBN-13); 3540959475
• ISSN（シリーズ）: 0302-9743
• タイトル: Integrated circuit and system design : power and timing modeling, optimization and simulation : 18th international workshop, PATMOS 2008 : Lisbon, Portugal, September 10-12, 2008 : revised selected papers. : Sep 2008, Lisbon, Portugal.
• シリーズタイトル: Lecture Notes in Computer Science ; 5349
• タイトル標目: Lecture notes in computer science ; 5349.
• 著者標目: Institute for Systems and Computer Engineering-Research and Development of Lisbon (INESC-ID); Svensson, Lars, 1960-; Monteiro, José, 1966-; Universidade Tecnica de Lisboa. Instituto Superior Tecnico.; PATMOS 2008 (2008 : Lisbon, Portugal)
• 出版事項: Berlin : Springer; New York : Springer
• 出版年月日等: c2009.
• 出版年（W3CDTF）: 2009
• 数量: xiii, 462 p. : ill. ; 24 cm.
• 出版地（国名コード）: DE
• 本文の言語コード: eng
• 件名標目: Integrated circuits -- Design and construction -- Congresses.; Integrated circuits -- Testing -- Congresses.; Computers -- Power supply -- Congresses.; Computer-aided design -- Congresses.
• LCC: TK7874.75
• NDLC: M17
• 一般注記: Revised selected papers and abstracts.
• 書誌注記: Includes bibliographical references and author index.
• 所蔵機関: 国立国会図書館
• 請求記号: M17-10-541
• 連携機関・データベース: 国立国会図書館 : 国立国会図書館蔵書; https://ndlsearch.ndl.go.jp
• 書誌ID（NDLBibID）: 000010136554; http://id.ndl.go.jp/bib/000010136554
• LC control number: 2009920524; https://lccn.loc.gov/2009920524
• OCLC番号: 310400666; https://www.worldcat.org/oclc/310400666
• 整理区分コード: 215