三相電圧形インバータ用モデル予測制御のFPGAによる実装手法の開発： モデルベース設計手法，HILシミュレーション，FPGAリソース最適化

• 資料種別: 博士論文
• タイトル: 三相電圧形インバータ用モデル予測制御のFPGAによる実装手法の開発： モデルベース設計手法，HILシミュレーション，FPGAリソース最適化
• 著者・編者: Kumar, Singh Vijay
• 著者標目: Kumar, Singh Vijay
• 出版年月日等: 2020-03-25
• 出版年（W3CDTF）: 2020-03-25
• 並列タイトル等: An Investigation on FPGA Implementation of Model Predictive Control for Three-Phase Voltage Source Inverters: Model-Based Design (MBD) Approach, Hardware-in-the-Loop (HIL) Simulation and FPGA Resource Optimization
• 授与機関名: 九州工業大学
• 授与年月日: 2020-03-25
• 授与年月日（W3CDTF）: 2020-03-25
• 報告番号: 甲第367号
• 学位: 博士（工学）
• 博論授与番号: 甲生工第367号
• 本文の言語コード: eng
• 件名標目: Field-programmable gate array; Finite control set-model predictive control; Model-based design; Voltage source inverter; Xilinx system generator
• 対象利用者: 一般
• 一般注記: 九州工業大学博士学位論文 学位記番号：生工博甲第367号 学位授与年月日：令和2年3月25日; 令和元年度
• DOI: 10.18997/00007902; https://doi.org/10.18997/00007902
• 国立国会図書館永続的識別子: info:ndljp/pid/11552019; https://dl.ndl.go.jp/pid/11552019
• コレクション（共通）: 障害者向け資料
• コレクション（障害者向け資料：レベル1）: テキストデータ
• コレクション（個別）: 国立国会図書館デジタルコレクション > デジタル化資料 > 博士論文; https://dl.ndl.go.jp/collections/A00014
• 収集根拠: 博士論文（自動収集）
• 受理日（W3CDTF）: 2020-10-06T21:18:06+09:00
• 記録形式（IMT）: application/pdf
• オンライン閲覧公開範囲: 国立国会図書館内限定公開
• デジタル化資料送信: 図書館・個人送信対象外
• 遠隔複写可否（NDL）: 可
• 掲載誌（URI）: https://doi.org/10.18997/00007902; http://hdl.handle.net/10228/00007902
• 連携機関・データベース: 国立国会図書館 : 国立国会図書館デジタルコレクション; https://dl.ndl.go.jp

• 要約等: Model predictive control （MPC）, a modern switching control method, has gained considerable interest in performing control objectives of power converters. One of the categories in a wide family of MPC is finite control set-MPC （FCS-MPC） that utilizes the discrete-time model of a power converter having a limited number of switching states for solving the optimization problem online. In FCS-MPC, a discrete-time model of the power converter is used to predict future values of control parameters and an optimization function （cost function） is used to select the optimized switching state of the converter. High computational requirements of the FCS-MPC is a concern for the system implementation. Field-programmable gate array （FPGA） is an effective alternative to handle the computational burden of the control algorithm because of its parallel processing nature. In general, the MPC algorithm is performed through a programming approach either for DSP or FPGA. However, digital resource utilization is another concern for the development and real-time system implementation. Digital resource optimization requires a high value of in-depth knowledge to write the hardware descriptive code. Moreover, debugging is also a tedious and time-consuming task that is not appropriate for the development and analysis of the controller as well as prototyping. In this work, the implementation of FCS-MPC is performed by adopting the modelling approach in a digital simulator that provides a virtual FPGA environment for system development. In addition, hardware-in-the-loop （HIL） technique is used for testing of controller performance before experimental validation. The current prediction is a core part of the FCS-MPC and a coefficient used for the current prediction that is computed using the system parameters affects the controller performance. In this work, a novel approach is presented to update the predictive model, called an adaptive predictive model, corresponding to a change in the load resistance while keeping a fixed value of load inductance. The fixed, approximated and adaptive values of a coefficient are adopted for current prediction to investigate the behaviour of the controller. The performance of the FCS-MPC depends on the sampling frequency used for the discretization of the converter model that governs the switching frequency of the converter. The performance can be improved with higher sampling frequency, however, resulting in higher switching frequency that ultimately increases the switching losses in the power devices. Apart from that, a non-zero steady-state error is one of the concerns of the FCS-MPC implementation. In general, dedicated constraints for the reduction in average switching frequency and SSE are incorporated inside a cost function in conventional FCS-MPC. Nevertheless, that ultimately increases the computational burden. A modified cost function based on a novel constraint is proposed for the improvement in SSE as well as a reduction in the switching frequency using the modified FCS-MPC approach. To validate the performance of the proposed constraint, a comparative analysis is presented with the constraint of a change in switching state considering indices SSE as well as average switching frequency. Moreover, the different load currents and sampling time are considered to evaluate SSE considering similar load current ripples. To evaluate the robustness of the FCS-MPC algorithms, a step-change in reference current is considered for the demonstration of dynamic performance. Moreover, an analytical approach based implementation strategies is proposed for FPGA resource optimization of the FCS-MPC development in a digital simulator for the FPGA-based system implementation. The implementation of FCS-MPC in stationary αβ and rotating dq frames is adopted for in-depth system analysis. The implementation strategies are compared based on FPGA resource requirements for the FCS-MPC in both frames corresponding to the fixed, approximated and adaptive coefficient values of the predictive model. The optimum design based controller model is used for the FPGA-based experimental system implementation. Xilinx system generator （XSG） as a digital simulator that is an integrated platform with MATLAB/Simulink is used for the development of the controller. The FCS-MPC is implemented for the load-side current control of a three-phase voltage source inverter （VSI） system. A Xilinx FPGA board （Zedboard Zynq Evaluation and Development Kit） is used for the HIL simulation as well as the real-time system implementation.
• DOI: 10.18997/00007902; https://doi.org/10.18997/00007902
• 記録形式（IMT）: application/pdf
• 一次資料へのリンクURL: sei_k_367.pdf （fulltext）; https://kyutech.repo.nii.ac.jp/record/6694/files/sei_k_367.pdf
• オンライン閲覧公開範囲: インターネット公開
• 連携機関・データベース: 国立情報学研究所 : 学術機関リポジトリデータベース（IRDB）（機関リポジトリ）; https://irdb.nii.ac.jp
• 提供元機関・データベース: 九州工業大学 : キューテイカー

目次

2023-08-05 再収集

2023-10-11 再収集