A Design Framework for Reconfigurable IPs with VLSI CADs (リコンフィギャラブルシステム)

A Design Framework for Reconfigurable IPs with VLSI CADs

(リコンフィギャラブルシステム)

Journal name: 電子情報通信学会技術研究報告 = IEICE technical report : 信学技報 112(203):2012.9.18・19

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Material Type: 記事
Title: A Design Framework for Reconfigurable IPs with VLSI CADs
Author/Editor: Qian ZHAO
Kazuki INOUE
Motoki AMAGASAKI 他
Series Title: リコンフィギャラブルシステム
Author Heading: Qian ZHAO
Kazuki INOUE
Motoki AMAGASAKI
Periodical title: 電子情報通信学会技術研究報告 = IEICE technical report : 信学技報
No. or year of volume/issue: 112(203):2012.9.18・19
Volume: 112
Issue: 203
Pages: 101-106
Publication date of volume/issue (W3CDTF): 2012-09
ISSN (Periodical Title): 0913-5685
ISSN-L (Periodical Title): 0913-5685
Publication (Periodical Title): 東京 : 電子情報通信学会
Place of Publication (Country Code): JP
Text Language Code: eng
Subject Heading: FPGA
CAD
Routing
NDLC: ZN33
Target Audience: 一般
Report No. (Article): RECONF2012-41
Holding library: 国立国会図書館
Call No.: Z16-940
Data Provider (Database): 国立国会図書館 : 国立国会図書館雑誌記事索引
https://ndlsearch.ndl.go.jp
Bibliographic ID (NDL): 024004974
http://id.ndl.go.jp/bib/024004974
Bibliographic Record Category (NDL): 632