A High Throughput LDPC Decoder Design Based on Novel Delta-value Message-passing Schedule (IPSJ Transactions on System LSI Design Methodology Vol.2)

A High Throughput LDPC Decoder Design Based on Novel Delta-value Message-passing Schedule

(IPSJ Transactions on System LSI Design Methodology Vol.2)

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Material Type: 記事
Title: A High Throughput LDPC Decoder Design Based on Novel Delta-value Message-passing Schedule
Author/Editor: WEN JI
XING LI
TAKESHI IKENAGA 他
Series Title: IPSJ Transactions on System LSI Design Methodology Vol.2
Author Heading: WEN JI
XING LI
TAKESHI IKENAGA
Periodical title: 情報処理学会論文誌論文誌トランザクション
No. or year of volume/issue: 2008年度(2) 2009.4
Volume: 2008年度
Issue: 2
Pages: 122-130
Publication date of volume/issue (W3CDTF): 2009-04
ISSN (Periodical Title): 1882-7772
ISSN-L (Periodical Title): 0387-5806
Publication (Periodical Title): 東京 : 情報処理学会
Place of Publication (Country Code): JP
Text Language Code: eng
NDLC: ZM13
Target Audience: 一般
Holding library: 国立国会図書館
Call No.: YH247-812
Data Provider (Database): 国立国会図書館 : 国立国会図書館雑誌記事索引
https://ndlsearch.ndl.go.jp
Bibliographic ID (NDL): 024341991
http://id.ndl.go.jp/bib/024341991
Bibliographic Record Category (NDL): 632