電源/グランドTSVを含む三次元積層型電源分配回路網のブロックLIMによる効率的な過渡解析 (非線形問題)

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電源/グランドTSVを含む三次元積層型電源分配回路網のブロックLIMによる効率的な過渡解析

(非線形問題)

Call No. (NDL)
Z16-940
Bibliographic ID of National Diet Library
024925986
Material type
記事
Author
永田 大成ほか
Publisher
東京 : 電子情報通信学会
Publication date
2013-09
Material Format
Paper
Journal name
電子情報通信学会技術研究報告 = IEICE technical report : 信学技報 113(225):2013.9.26・27
Publication Page
p.1-6
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Paper

Material Type
記事
Author/Editor
永田 大成
關根 惟敏
浅井 秀樹
Series Title
Alternative Title
Efficient Transient Analysis of 3-D Stacked On-Chip Power Distribution Network with Power/Ground Through Silicon Vias by Using Block Latency Insertion Method
Periodical title
電子情報通信学会技術研究報告 = IEICE technical report : 信学技報
No. or year of volume/issue
113(225):2013.9.26・27
Volume
113
Issue
225