行列圧縮とGPGPUを利用したペトリネットシミュレーションの高速化 (回路とシステム)

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行列圧縮とGPGPUを利用したペトリネットシミュレーションの高速化

(回路とシステム)

Call No. (NDL)
Z16-940
Bibliographic ID of National Diet Library
025413469
Material type
記事
Author
河村 喬ほか
Publisher
東京 : 電子情報通信学会
Publication date
2014-03
Material Format
Paper
Journal name
電子情報通信学会技術研究報告 = IEICE technical report : 信学技報 113(463):2014.3.6・7
Publication Page
p.91-96
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Paper

Material Type
記事
Author/Editor
河村 喬
佐藤 洋一郎
横川 智教 他
Alternative Title
High-speed Petri Net Simulation Using Matrix Compression and GPGPU
Periodical title
電子情報通信学会技術研究報告 = IEICE technical report : 信学技報
No. or year of volume/issue
113(463):2014.3.6・7
Volume
113
Issue
463