Bibliographic Record
You can check the details of this material, its authority (keywords that refer to materials on the same subject, author's name, etc.), etc.
- Material Type
- 記事
- Author/Editor
- 藤原 晃一阿部 晋矢川村 一志 他
- Series Title
- Alternative Title
- A Floorplan-driven High-Level Synthesis Algorithm for Reducing Multiplexer Inputs Targeting FPGAs
- Periodical title
- 電子情報通信学会技術研究報告 = IEICE technical report : 信学技報
- No. or year of volume/issue
- 114(122):2014.7.9-11
- Volume
- 114
- Issue
- 122