多面体モデルに基づく並列化コンパイラにおける制約条件の緩和 (VLSI設計技術)

多面体モデルに基づく並列化コンパイラにおける制約条件の緩和

(VLSI設計技術)

Journal name: 電子情報通信学会技術研究報告 = IEICE technical report : 信学技報 114(426):2015.1.29・30

This page shows libraries in Japan other than the National Diet Library that hold the material.

Please contact your local library for information on how to use materials or whether it is possible to request materials from the holding libraries.

other

CiNii Research
Search Service
You can check the holdings of institutions and databases with which CiNii Research is linked at the site of CiNii Research.
Check the holdings of this book

You can check the details of this material, its authority (keywords that refer to materials on the same subject, author's name, etc.), etc.

Material Type: 記事
Title: 多面体モデルに基づく並列化コンパイラにおける制約条件の緩和
Author/Editor: 尾形冬馬
中野秀洋
宮内新
Series Title: VLSI設計技術
Author Heading: 尾形冬馬
中野秀洋
宮内新
Alternative Title: Relaxing constraint conditions in parallelizing compiler based on polyhedral model
Periodical title: 電子情報通信学会技術研究報告 = IEICE technical report : 信学技報
No. or year of volume/issue: 114(426):2015.1.29・30
Volume: 114
Issue: 426
Pages: 187-192
Publication date of volume/issue (W3CDTF): 2015-01
ISSN (Periodical Title): 0913-5685
ISSN-L (Periodical Title): 0913-5685
Publication (Periodical Title): 東京 : 電子情報通信学会
Place of Publication (Country Code): JP
Text Language Code: jpn
Subject Heading: コンパイラ
並列化
多面体モデル
Compiler
Parallelization
Polyhedral Model
NDLC: ZN33
Target Audience: 一般
Report No. (Article): VLD2014-142
Holding library: 国立国会図書館
Call No.: Z16-940
Data Provider (Database): 国立国会図書館 : 国立国会図書館雑誌記事索引
https://ndlsearch.ndl.go.jp
Bibliographic ID (NDL): 026148490
http://id.ndl.go.jp/bib/026148490
Bibliographic Record Category (NDL): 632