A full scan design method for asynchronous sequential circuits based on C-element scan paths (ディペンダブルコンピューティング)

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A full scan design method for asynchronous sequential circuits based on C-element scan paths

(ディペンダブルコンピューティング)

Call No. (NDL)
Z16-940
Bibliographic ID of National Diet Library
10751055
Material type
記事
Author
岩田 大志ほか
Publisher
東京 : 電子情報通信学会
Publication date
2010-06-25
Material Format
Paper
Journal name
電子情報通信学会技術研究報告 = IEICE technical report : 信学技報 110(106) 2010.6.25
Publication Page
p.1~6
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Paper

Material Type
記事
Author/Editor
岩田 大志
大竹 哲史
井上 美智子 他
Alternative Title
C素子スキャンパスを用いた非同期式順序回路に対する完全スキャン設計法
Periodical title
電子情報通信学会技術研究報告 = IEICE technical report : 信学技報
No. or year of volume/issue
110(106) 2010.6.25
Volume
110
Issue
106