IPコアの多重接続許容下において通信仕様を満たす通信機構合成手法 (コンピュータシステム)

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IPコアの多重接続許容下において通信仕様を満たす通信機構合成手法

(コンピュータシステム)

Call No. (NDL)
Z16-940
Bibliographic ID of National Diet Library
11046595
Material type
記事
Author
久保田 洋進ほか
Publisher
東京 : 電子情報通信学会
Publication date
2011-03
Material Format
Paper
Journal name
電子情報通信学会技術研究報告 = IEICE technical report : 信学技報 110(473) 2011.3.18・19
Publication Page
p.195~200
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Paper

Material Type
記事
Author/Editor
久保田 洋進
杉原 真
Alternative Title
A bus architecture synthesis method satisfying communication specifications under allowance of multiple connections of IP cores
Periodical title
電子情報通信学会技術研究報告 = IEICE technical report : 信学技報
No. or year of volume/issue
110(473) 2011.3.18・19
Volume
110
Issue
473