ビルディングブロック方式による16ビットCPU用LSIの設計

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Material Type: 記事
Title: ビルディングブロック方式による16ビットCPU用LSIの設計
Author/Editor: 徳田健他
Author Heading: 徳田健
Periodical title: 三菱電機技報
No. or year of volume/issue: 58(3) 1984.03
Volume: 58
Issue: 3
Pages: p244～248
Publication date of volume/issue (W3CDTF): 1984-03
ISSN (Periodical Title): 0369-2302
ISSN-L (Periodical Title): 0369-2302
Publication (Periodical Title): 東京 : 三菱電機エンジニアリングe-ソリューション&サービス事業部 ; 1962-2023
Place of Publication (Country Code): JP
Text Language Code: jpn
NDLC: ZN31
Target Audience: 一般
Article Type: 記事分類: データ処理・計算機器--ハードウェア
Holding library: 国立国会図書館
Call No.: Z16-263
Data Provider (Database): 国立国会図書館 : 国立国会図書館雑誌記事索引
https://ndlsearch.ndl.go.jp
Bibliographic ID (NDL): 2967517
http://id.ndl.go.jp/bib/2967517
Bibliographic Record Category (NDL): 632