Volume number121(12) 2001.12
4進SD数全加算器に...

4進SD数全加算器におけるニューロンMOSFETのフローティングゲート面積の縮小

Icons representing 記事

4進SD数全加算器におけるニューロンMOSFETのフローティングゲート面積の縮小

Call No. (NDL)
Z16-795
Bibliographic ID of National Diet Library
5994548
Material type
記事
Author
浅香 篤ほか
Publisher
東京 : 電気学会
Publication date
2001-12
Material Format
Paper
Journal name
電気学会論文誌. C, 電子・情報・システム部門誌 = IEEJ transactions on electronics, information and systems 121(12) 2001.12
Publication Page
p.1926~1933
View All

Holdings of Libraries in Japan

This page shows libraries in Japan other than the National Diet Library that hold the material.

Please contact your local library for information on how to use materials or whether it is possible to request materials from the holding libraries.

other

  • CiNii Research

    Search Service
    Digital
    You can check the holdings of institutions and databases with which CiNii Research is linked at the site of CiNii Research.

Bibliographic Record

You can check the details of this material, its authority (keywords that refer to materials on the same subject, author's name, etc.), etc.

Paper Digital

Material Type
記事
Author/Editor
浅香 篤
今西 茂
村中 徳明
Periodical title
電気学会論文誌. C, 電子・情報・システム部門誌 = IEEJ transactions on electronics, information and systems
No. or year of volume/issue
121(12) 2001.12
Volume
121
Issue
12
Pages
1926~1933
Publication date of volume/issue (W3CDTF)
2001-12