演算/メモリ性能バランスを考慮したCell/B.E.向けオンチップ・メモリ活用法とその評価 (集積回路)

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演算/メモリ性能バランスを考慮したCell/B.E.向けオンチップ・メモリ活用法とその評価

(集積回路)

Call No. (NDL)
Z16-940
Bibliographic ID of National Diet Library
9527903
Material type
記事
Author
林 徹生ほか
Publisher
東京 : 電子情報通信学会
Publication date
2008-05
Material Format
Paper
Journal name
電子情報通信学会技術研究報告 = IEICE technical report : 信学技報 108(28) 2008.5.13・14
Publication Page
p.105~110
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Paper

Material Type
記事
Author/Editor
林 徹生
福本 尚人
今里 賢一 他
Series Title
Alternative Title
Performance balancing: an implementation of efficient on-chip memory hierarchy on Cell/B.E
Periodical title
電子情報通信学会技術研究報告 = IEICE technical report : 信学技報
No. or year of volume/issue
108(28) 2008.5.13・14
Volume
108
Issue
28