S1C MOSFETのダブルパルス試験における高電圧差動プローブによる測定波形の差異に関するー検討

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Material Type: 記事
Title: S1C MOSFETのダブルパルス試験における高電圧差動プローブによる測定波形の差異に関するー検討
Author Heading: 上原充暉
南政孝
Publication Date: 2024
Publication Date (W3CDTF): 2024
Periodical title: パワエレ学会
No. or year of volume/issue: 50 0
Volume: 50
Issue: 0
Pages: 187-187
Publication date of volume/issue (W3CDTF): 2024
ISSN (Periodical Title): 13488538
Publication (Periodical Title): The Japan Institute of Power Electronics
Text Language Code: ja
Target Audience: 一般
DOI: 10.5416/jipe.50.187
https://doi.org/10.5416/jipe.50.187
Related Material (URI): https://www.jstage.jst.go.jp/article/jipe/50/0/50_JIPE-50-41/_pdf
References: 高速・低損失SiC-MOSFET駆動回路の検討
https://cir.nii.ac.jp/crid/1390282679585442176
SiC-MOSFETを対象とした直流側寄生インダクタンスに起因するスイッチング損失の影響評価
https://cir.nii.ac.jp/crid/1390282679634256896
Data Provider (Database): 国立情報学研究所 : CiNii Research
https://cir.nii.ac.jp/
Original Data Provider (Database): Japan Link Center
https://japanlinkcenter.org/top
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