Energy-efficient High-level Synthesis Algorithms for Floorplan-driven SoC Architectures
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- Material Type
- 博士論文
- Author/Editor
- 阿部, 晋矢Abe, Shinya
- Author Heading
- Publication Date
- 2014
- Publication Date (W3CDTF)
- 2014
- Alternative Title
- フロアプラン指向集積回路アーキテクチャを対象とした低エネルギー高位合成に関する研究
- Pages
- 1-143
- Degree grantor/type
- 早稲田大学
- Date Granted
- 2015-03-15