D, T, SRファジィフリップフロップとファジィメモリ基本素子の提案・論理解析及び回路設計

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Material Type: 博士論文
Title: D, T, SRファジィフリップフロップとファジィメモリ基本素子の提案・論理解析及び回路設計
Author/Editor: 吉田, 真一
Yoshida, Shin-ichi
Author Heading: 吉田, 真一
Yoshida, Shin-ichi
Publication Date: 2001-02
Publication Date (W3CDTF): 2001-02
Alternative Title: Proposal, Logical Analysis, and Circuit Design of D, T, SR Fuzzy Flip-Flops and Fuzzy Memory Elements
Degree grantor/type: 東京工業大学
Date Granted: 2001-03-26
Dissertation Number: A4807
Degree Type: 博士（工学）
Text Language Code: eng
Target Audience: 一般
Note (General): identifier:oai:t2r2.star.titech.ac.jp:99003224
Format (IMT): application/pdf
Source: fulltext
http://t2r2.star.titech.ac.jp/rrws/file/CTT100594244/ATD100000413/116878194.pdf
Access Restrictions: インターネット公開
Data Provider (Database): 国立情報学研究所 : 学術機関リポジトリデータベース（IRDB）（機関リポジトリ）
https://irdb.nii.ac.jp
Original Data Provider (Database): 東京工業大学 : 東京工業大学リサーチリポジトリ