Performance Evaluation of a Reconfigurable Instruction Set Processor

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Note (General)：: International SoC Design Conference (ISOCC 2008) : 2008年11月24日（月）～25日（火） : Busan, Korea

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Reconfigurable Instructions Set Processors/A Combined Analytical and Simulation-Based Model (CAnSO)/Experiments/Conclusions and Future Work

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Material Type: 文書・図像類
Title: Performance Evaluation of a Reconfigurable Instruction Set Processor
Author/Editor: Mehdipour, Farhad
Noori, Hamid
本田, 宏明
井上, 弘士
村上, 和彰
Author Heading: Mehdipour, Farhad
Noori, Hamid
本田, 宏明ホンダ, ヒロアキ
井上, 弘士イノウエ, コウジ
村上, 和彰ムラカミ, カズアキ
Publication, Distribution, etc.: 九州大学システムLSI研究センター
Publication Date: 2008-11-24
Publication Date (W3CDTF): 2008-11-24
Periodical title: SLRC プレゼンテーション
Pages: 1-
Text Language Code: eng
Subject Heading: CAnSO
A Combined Analytical and Simulation-Based Model
RAC
Target Audience: 一般
Note (General): International SoC Design Conference (ISOCC 2008) : 2008年11月24日（月）～25日（火） : Busan, Korea
DOI: 10.15017/14879
Access Restrictions: インターネット公開
Related Material: http://soc.postech.ac.kr/isocc2008/
Data Provider (Database): 国立情報学研究所 : 学術機関リポジトリデータベース（IRDB）（機関リポジトリ）
https://irdb.nii.ac.jp
Original Data Provider (Database): 九州大学 : 九州大学学術情報リポジトリ