A Computer-Aided Design Methodology for Low Power Sequential Logic Circuits

• Material Type: 博士論文
• Title: A Computer-Aided Design Methodology for Low Power Sequential Logic Circuits
• Author/Editor: Monteiro, Jose Carlos Alves Pereira.
• Author Heading: Monteiro, Jose Carlos Alves Pereira.
• Publication, Distribution, etc.: Cambridge : Massachusetts Institute of Technology
• Publication Date: 1996.
• Extent: 3 microfiches (210 fr.) : negative, ill.
• Degree grantor/type: Massachusetts Institute of Technology
• Date Granted: 1996.
• Date Granted (W3CDTF): 1996
• Note (Dissertation): 博士論文; Thesis (doctoral) --Massachusetts Institute of Technology, 1996.
• Place of Publication (Country Code): US
• Text Language Code: eng
• Note (Material Type): [microform]
• Note (Bibliography): Includes bibliographies.
• Holding library: 国立国会図書館
• Call No.: LS-DIMIT-96-261
• Data Provider (Database): 国立国会図書館 : 国立国会図書館蔵書; https://ndlsearch.ndl.go.jp
• Bibliographic ID (NDL): 000003413138; http://id.ndl.go.jp/bib/000003413138
• Bibliographic Record Category (NDL): 216