Timing analysis and simulation for signal integrity engineers / Greg Edlund.

• Material Type: 図書
• ISBN: 0132365049 (hbk. : alk. paper); 9780132365048 (hbk. : alk. paper)
• Title: Timing analysis and simulation for signal integrity engineers / Greg Edlund.
• Series Title: Prentice Hall modern semiconductor design series
• Title Heading: Prentice Hall modern semiconductor design series. Prentice Hall signal integrity library.
• Author Heading: Edlund, Greg.
• Publication, Distribution, etc.: Upper Saddle River, NJ : Prentice Hall
• Publication Date: c2008.
• Publication Date (W3CDTF): 2008
• Extent: xx, 241 p. : ill. ; 25 cm.
• Place of Publication (Country Code): US
• Text Language Code: eng
• Subject Heading: Timing circuits -- Design and construction.; Digital electronics -- Design and construction.; Signal processing -- Digital techniques.; Signal integrity (Electronics)
• LCC: TK7874.65
• DDC: 621.3815
• NDLC: ND386
• Note (General): "Prentice Hall signal integrity library"--Cover.
• Note (Bibliography): Includes bibliographical references (p. 233-234) and index.
• Holding library: 国立国会図書館
• Call No.: ND386-B13
• Data Provider (Database): 国立国会図書館 : 国立国会図書館蔵書; https://ndlsearch.ndl.go.jp
• Bibliographic ID (NDL): 000010022519; http://id.ndl.go.jp/bib/000010022519
• LC Control Number: 2007030307; https://lccn.loc.gov/2007030307
• OCLC No.: 156831239; https://www.worldcat.org/oclc/156831239
• Cataloging Rule: Anglo-American Cataloging Rules
• Bibliographic Record Category (NDL): 211

• Contents: Engineering reliable digital interfacesChip-to-chip timingInside IO circuits...