Architecture design and functional verification of simultaneous multithreading processor

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Material Type: 博士論文
Title: Architecture design and functional verification of simultaneous multithreading processor
Author/Editor: Zang Chengjie [著]
Author Heading: 臧, 成杰ザン, チェンジェ
Publication, Distribution, etc.: [Zang Chengjie]
Publication Date: [2009]
Publication Date (W3CDTF): 2009
Extent: 1冊
Alternative Title: 同時マルチスレッディングプロセッサのアーキテクチャ設計と機能検証ドウジマルチスレッディングプロセッサノアーキテクチャセッケイトキノウケンショウ
Degree grantor/type: 早稲田大学
Date Granted: 平成21年6月22日
Date Granted (W3CDTF): 2009
Dissertation Number: 甲第2877号
Degree Type: 博士 (工学)
Note (Dissertation): 博士論文
Place of Publication (Country Code): JP
Text Language Code: eng
Alias of Author: Zang, Chengjie
NDLC: UT51
Note (General): 博士論文
Holding library: 国立国会図書館
Call No.: UT51-2010-D694
Data Provider (Database): 国立国会図書館 : 国立国会図書館蔵書
https://ndlsearch.ndl.go.jp
Bibliographic ID (NDL): 000010948195
http://id.ndl.go.jp/bib/000010948195
Bibliographic Record Category (NDL): 213