Cache and interconnect architectures in multiprocessors

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Note (General)：: Papers presented at a workshop titled Cache and Interconnect Architectures in Multiprocessors, held in Eilat, Israel, May 25-26, 1989Includes bibliogr...

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Material Type: 図書
ISBN: 0792390741
Title: Cache and interconnect architectures in multiprocessors
Author/Editor: edited by Michel Dubois and Shreekant S. Thakkar
Author Heading: Dubois, Michel
https://ci.nii.ac.jp/author/DA04967580
Thakkar, S. S.
https://ci.nii.ac.jp/author/DA04370657
Publication, Distribution, etc.: Kluwer Academic Publishers
Publication Date: c1990
Publication Date (W3CDTF): 1990
Size: 25 cm
Alternative Title: Interconnect architectures in multiprocessors
Place of Publication (Country Code): us
Text Language Code: en
Subject Heading: Cache memory -- Congresses
Multiprocessors -- Congresses
Computer network architectures -- Congresses
LCC: TK7895.M4
Target Audience: 一般
Note (General): Papers presented at a workshop titled Cache and Interconnect Architectures in Multiprocessors, held in Eilat, Israel, May 25-26, 1989
Includes bibliographical references and index
Related Material (URI): https://ci.nii.ac.jp/ncid/BA11153109#entity
https://lccn.loc.gov/90037022
Data Provider (Database): 国立情報学研究所 : CiNii Research
Original Data Provider (Database): CiNii Books
https://ci.nii.ac.jp/books
NCID: https://ci.nii.ac.jp/ncid/BA11153109 : BA11153109
LC Control Number: 90037022
https://lccn.loc.gov/90037022