Guide to computer processor architecture : a RISC-V approach, with high-level synthesis : [pbk.]

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Material Type: 図書
ISBN: 9783031180224
Title: Guide to computer processor architecture : a RISC-V approach, with high-level synthesis
Volume: : [pbk.]
Author/Editor: Bernard Goossens
Author Heading: Goossens, Bernard
Publication, Distribution, etc.: Springer
Publication Date: c2023
Publication Date (W3CDTF): 2023
Size: 24 cm
Place of Publication (Country Code): sz
Text Language Code: en
Subject Heading: Computer architecture
RISC microprocessors
Target Audience: 一般
Note (General): Includes biblioraphical references and index
Related Material: Undergraduate topics in computer science
https://cir.nii.ac.jp/crid/1130000798258126208
Related Material (URI): https://ci.nii.ac.jp/ncid/BD0444816X#entity
Periodical Title: Undergraduate topics in computer science
https://cir.nii.ac.jp/crid/1130000798258126208
Data Provider (Database): 国立情報学研究所 : CiNii Research
Original Data Provider (Database): CiNii Books
https://ci.nii.ac.jp/books
NCID: https://ci.nii.ac.jp/ncid/BD0444816X : BD0444816X