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Timing analysis and simulation for signal integrity engineers / Greg Edlund. (Prentice Hall modern semiconductor design series)

Timing analysis and simulation for signal integrity engineers / Greg Edlund. (Prentice Hall modern semiconductor design series)
Paper図書
Prentice Hallc2008.<ND386-B13>
National Diet Library
  • Subject HeadingTiming circuits -- Design and construction. Digital electronics -- Desig...

Timing analysis and simulation for signal integrity engineers

Timing analysis and simulation for signal integrity engineers
Paper図書
Greg EdlundPearson Educationc2008
Other Libraries in Japan
  • Subject HeadingTiming circuits -- Design and construction Digital electronics -- Design...
  • Subject Heading (ID)Timing circuits -- Design and construction Digital electronics -- Design...

Skew-tolerant circuit design

Skew-tolerant circuit design
Paper図書
David HarrisMorgan Kaufmann Publishersc2001
Other Libraries in Japan
  • Subject HeadingTiming circuits -- Design and construction Integrated circuits -- Very l...
  • Subject Heading (ID)Timing circuits -- Design and construction Integrated circuits -- Very l...

Digital system clocking : high performance and low-power aspects cloth

Digital system clocking : high performance and low-power aspects cloth
Paper図書
Vojin G. Oklobdzija ... [et al.]IEEEc2003
Other Libraries in Japan
  • Subject HeadingTiming circuits -- Design and construction Memory management (Computer s...
  • Subject Heading (ID)Timing circuits -- Design and construction Memory management (Computer s...

Timing optimization through clock skew scheduling

Timing optimization through clock skew scheduling
Paper図書
Ivan S. Kourtev, Eby G. FriedmanKluwer Academicc2000
Other Libraries in Japan
  • Subject Heading...d construction Timing circuits -- Design and construction Synchronization
  • Subject Heading (ID)...d construction Timing circuits -- Design and construction Synchronization

Synchronization techniques for digital receivers

Synchronization techniques for digital receivers
Paper図書
Umberto Mengali and Aldo N. D'AndreaPlenum Pressc1997
Other Libraries in Japan
  • Subject Heading...t and supplies Timing circuits -- Design and construction Synchronization
  • Subject Heading (ID)...t and supplies Timing circuits -- Design and construction Synchronization

High performance clock distribution networks

High performance clock distribution networks
Paper図書
edited by Eby G. FriedmanKluwer Academic Publishersc1997
Other Libraries in Japan
  • Subject Heading...d construction Timing circuits -- Design and construction Synchronization
  • Subject Heading (ID)...d construction Timing circuits -- Design and construction Synchronization

Monolithic phase-locked loops and clock recovery circuits : theory and design

Monolithic phase-locked loops and clock recovery circuits : theory and design
Paper図書
edited by Behzag RazaviIEEE Pressc1996
Other Libraries in Japan
  • Subject Heading...d construction Timing circuits -- Design and construction Integrated circuits -- Design...
  • Subject Heading (ID)...d construction Timing circuits -- Design and construction Integrated circuits -- Design...

Clock distribution networks in VLSI circuits and systems

Clock distribution networks in VLSI circuits and systems
Paper図書
edited by Eby G. FriedmanInstitute of Electrical and Electronics Engineers1995
Other Libraries in Japan
  • Subject Heading...d construction Timing circuits -- Design and construction
  • Subject Heading (ID)...d construction Timing circuits -- Design and construction

Statistical analysis and optimization for VLSI : timing and power

Statistical analysis and optimization for VLSI : timing and power
Paper図書
Ashish Srivastava, Dennis Sylvester, David BlaauwSpringerc2005
Other Libraries in Japan
  • Subject Heading...stical methods Timing circuits -- Design and construction -- Statistical methods Mathem...
  • Subject Heading (ID)...stical methods Timing circuits -- Design and construction -- Statistical methods Mathem...

Synchronization design for digital systems

Synchronization design for digital systems
Paper図書
by Teresa H. Meng ; with contributions by David Messerschmitt, Steven Nowick, David DillKluwer Academicc1991
Other Libraries in Japan
  • Subject HeadingTiming circuits -- Design and construction Digital integrated circuits -...
  • Subject Heading (ID)Timing circuits -- Design and construction Digital integrated circuits -...

Modeling embedded systems and SoCs : concurrency and time in models of computation

Modeling embedded systems and SoCs : concurrency and time in models of computation
Paper図書
Axel JantschMorgan Kaufmannc2004
Other Libraries in Japan
  • Subject Heading...ata processing Timing circuits -- Design and construction -- Data processing Multitaski...
  • Subject Heading (ID)...ata processing Timing circuits -- Design and construction -- Data processing Multitaski...

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