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Timing analysis and simulation for signal integrity engineers / Greg Edlund. (Prentice Hall modern semiconductor design series)
Timing analysis and simulation for signal integrity engineers / Greg Edlund. (Prentice Hall modern semiconductor design series)
Paper
図書
Prentice Hall
c2008.
<ND386-B13>
National Diet Library
Subject Heading
Timing circuits -- Design and construction.
Digital electronics -- Design...
Timing analysis and simulation for signal integrity engineers
Timing analysis and simulation for signal integrity engineers
Paper
図書
Greg Edlund
Pearson Education
c2008
Other Libraries in Japan
Skew-tolerant circuit design
Skew-tolerant circuit design
Paper
図書
David Harris
Morgan Kaufmann Publishers
c2001
Other Libraries in Japan
Digital system clocking : high performance and low-power aspects cloth
Digital system clocking : high performance and low-power aspects cloth
Paper
図書
Vojin G. Oklobdzija ... [et al.]
IEEE
c2003
Other Libraries in Japan
Timing optimization through clock skew scheduling
Timing optimization through clock skew scheduling
Paper
図書
Ivan S. Kourtev, Eby G. Friedman
Kluwer Academic
c2000
Other Libraries in Japan
Synchronization techniques for digital receivers
Synchronization techniques for digital receivers
Paper
図書
Umberto Mengali and Aldo N. D'Andrea
Plenum Press
c1997
Other Libraries in Japan
High performance clock distribution networks
High performance clock distribution networks
Paper
図書
edited by Eby G. Friedman
Kluwer Academic Publishers
c1997
Other Libraries in Japan
Monolithic phase-locked loops and clock recovery circuits : theory and design
Monolithic phase-locked loops and clock recovery circuits : theory and design
Paper
図書
edited by Behzag Razavi
IEEE Press
c1996
Other Libraries in Japan
Clock distribution networks in VLSI circuits and systems
Clock distribution networks in VLSI circuits and systems
Paper
図書
edited by Eby G. Friedman
Institute of Electrical and Electronics Engineers
1995
Other Libraries in Japan
Statistical analysis and optimization for VLSI : timing and power
Statistical analysis and optimization for VLSI : timing and power
Paper
図書
Ashish Srivastava, Dennis Sylvester, David Blaauw
Springer
c2005
Other Libraries in Japan
Synchronization design for digital systems
Synchronization design for digital systems
Paper
図書
by Teresa H. Meng ; with contributions by David Messerschmitt, Steven Nowick, David Dill
Kluwer Academic
c1991
Other Libraries in Japan
Modeling embedded systems and SoCs : concurrency and time in models of computation
Modeling embedded systems and SoCs : concurrency and time in models of computation
Paper
図書
Axel Jantsch
Morgan Kaufmann
c2004
Other Libraries in Japan
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