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Studies on F-Scan: A Design for Testability Method for Functional RTL Circuits
Studies on F-Scan: A Design for Testability Method for Functional RTL Circuits
Digital
博士論文
Obien, Marie Engelene Jimenez
Nara Institute of Science and Technology
2011-03-24
Other Libraries in Japan
Subject Heading
... level testing
delay fault testing
Instruction-based self-testing of performance oriented faults in modern processors
Instruction-based self-testing of performance oriented faults in modern processors
Digital
博士論文
Singh, Virendra
Nara Institute of Science and Technology
2005-09-30
Other Libraries in Japan
Subject Heading
...riented faults
delay fault testing
instruction-based self-testin...
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