タイトル（掲載誌）IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS
一般注記type:text
In this paper, analytical expressions and design equations are presented for the class-E amplifier with the MOSFET nonlinear drain-source and linear gate-drain parasitic capacitances along with the external linear shunt capacitance. The class-E amplifier characteristics are presented as functions of the ratio of the sum of the external linear shunt capacitance and the MOSFET linear gate-drain capacitance to the MOSFET drain-source junction capacitance when the switch voltage is zero. Although the effect of the MOSFET linear gate-drain capacitance is similar to that of the external linear shunt capacitance on the design of the class-E amplifier with the square input voltage, the difference between their effects should be considered for the sinusoidal input voltage, which is one of the most important suggestions in this paper. Additionally, analytical expressions of output power capability is given, which is considerable affected by the external linear shunt capacitance. Two design examples are presented with taken into account the output power as design specification at 8.7-W output power and 4-MHz operating frequency along with the PSpice-simulations and experimental waveforms.
一次資料へのリンクURLhttps://opac.ll.chiba-u.jp/da/curator/900118202/20150130_SEKIYA.pdf
連携機関・データベース国立情報学研究所 : 学術機関リポジトリデータベース（IRDB）（機関リポジトリ）