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Functional verification of RTL hardware designs

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Material Type: 博士論文
Title: Functional verification of RTL hardware designs
Author/Editor: Palacios, Alberto [著]
Author Heading: Palacios Pawlovsky, Alberto ( 01103232 )Authorities
Alternative Title: レジスタ転送レベルのハードウェア設計における機能検証レジスタテンソウレベルノハードウェアセッケイニオケルキノウケンショウ
Degree grantor/type: 長岡技術科学大学
Date Granted: 平成3年3月25日
Date Granted (W3CDTF): 1991
Dissertation Number: 甲第33号
Degree Type: 工学博士
Note (Dissertation): 博士論文
Place of Publication (Country Code): JP
NDLC: UT51
UT31
Note (General): 博士論文
Holding library: 国立国会図書館
Call No.: UT51-91-K65
Data Provider (Database): 国立国会図書館 : 国立国会図書館蔵書
https://ndlsearch.ndl.go.jp
Bibliographic ID (NDL): 000000240540
http://id.ndl.go.jp/bib/000000240540
Bibliographic Record Category (NDL): 213