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Table of Contents
はじめに
第1章 VLSI設計の概略
第2章 HDL設計の概略
第3章 HDLの構文と意味
第4章 HDLによるRTL回路の記述
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Kanto
さいたま市立中央図書館
Paper- 549.7 エイ
- 01100920105
千葉県立西部図書館
Paper- 5497/ 95/
- 1101777021
神奈川県立川崎図書館
Paper- 549.7-129
- 80931744
静岡市立中央図書館
Paper- 549.7-エ
- 112971555
Tokai-Hokuriku
名古屋市図書館
Paper- 5497/KK/
- 0234280766
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Bibliographic Record
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- Material Type
- 図書
- ISBN
- 4-320-12027-2
- Title Transcription
- HDL ニ ヨル VLSI セッケイ : VerilogHDL ト VHDL ニ ヨル CPU セッケイ
- Author/Editor
- 深山正幸 [ほか]著
- Edition
- 第2版
- Author Heading
- 深山, 正幸, 1966- フカヤマ, マサユキ, 1966- ( 00737828 )Authorities
- Publication, Distribution, etc.
- Publication Date
- 2002.1
- Publication Date (W3CDTF)
- 2002