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博士論文

High performance intra algorithm and parallel hardware architecture for the next generation video coding

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High performance intra algorithm and parallel hardware architecture for the next generation video coding

Persistent ID (NDL)
info:ndljp/pid/11116612
Material type
博士論文
Author
Shi, Wen
Publisher
-
Publication date
2018-03-23
Material Format
Digital
Capacity, size, etc.
-
Name of awarding university/degree
徳島大学,博士（工学）
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Digital

Material Type
博士論文
Title
High performance intra algorithm and parallel hardware architecture for the next generation video coding
Author/Editor
Shi, Wen
Author Heading
Shi, Wen
Publication Date
2018-03-23
Publication Date (W3CDTF)
2018-03-23
Alternative Title
次世代動画像符号化標準における高効率画面内予測アルゴリズム及びそのアーキテクチャに関する研究
Degree grantor/type
徳島大学
Date Granted
2018-03-23
Date Granted (W3CDTF)
2018-03-23