博士論文
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Controlling Value Based Pseudo Power Gating for Power-efficient LSI Design

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Controlling Value Based Pseudo Power Gating for Power-efficient LSI Design

Persistent ID (NDL)
info:ndljp/pid/9278117
Material type
博士論文
Author
Jin, Yuほか
Publisher
-
Publication date
2013
Material Format
Digital
Capacity, size, etc.
-
Name of awarding university/degree
早稲田大学,博士(工学)
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Note (General):

早大学位記番号:新6590

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Digital

Material Type
博士論文
Author/Editor
Jin, Yu
金, 予
Author Heading
Publication Date
2013
Publication Date (W3CDTF)
2013
Alternative Title
省電力LSI設計のための制御値に基づく疑似パワーゲーティング
Degree grantor/type
早稲田大学
Date Granted
2014-02-17
Date Granted (W3CDTF)
2014-02-17