博士論文
ImageImageImage

Energy-efficient High-level Synthesis Algorithms for Floorplan-driven SoC Architectures

Icons representing 博士論文
The cover of this title could differ from library to library. Link to Help Page

Energy-efficient High-level Synthesis Algorithms for Floorplan-driven SoC Architectures

Persistent ID (NDL)
info:ndljp/pid/9550520
Material type
博士論文
Author
Abe, Shinyaほか
Publisher
-
Publication date
2014
Material Format
Digital
Capacity, size, etc.
-
Name of awarding university/degree
早稲田大学,博士(工学)
View All

Notes on use at the National Diet Library

Notes on use

Note (General):

早大学位記番号:新6863

Bibliographic Record

You can check the details of this material, its authority (keywords that refer to materials on the same subject, author's name, etc.), etc.

Digital

Material Type
博士論文
Author/Editor
Abe, Shinya
阿部, 晋矢
Publication Date
2014
Publication Date (W3CDTF)
2014
Alternative Title
フロアプラン指向集積回路アーキテクチャを対象とした低エネルギー高位合成に関する研究
Degree grantor/type
早稲田大学
Date Granted
2015-03-15
Date Granted (W3CDTF)
2015-03-15